1. Field of the Invention
The present invention relates to a DC/DC converter which supplies an operating voltage of an electronic apparatus, and more specifically to a DC/DC converter low in power consumption, which clamps the output of an error amplifier circuit of the DC/DC converter.
2. Background Art
A related art DC/DC converter will be described. FIG. 3 is a circuit diagram illustrating the related art DC/DC converter.
The related art DC/DC converter is equipped with an error amplifier circuit 107, a comparator 109, an oscillation circuit 110, an amplifier 108, a flip-flop circuit 111, a clamp circuit 300, a reference voltage circuit 106, a coil 115, a capacitor 116, a PMOS transistor 112, an NMOS transistor 113, resistors 104, 105 and 114, a ground terminal 100, an output terminal 102, and a power supply terminal 101. The clamp circuit 300 is equipped with a constant current circuit 302, a constant voltage circuit 301, PMOS transistors 303 and 305, NMOS transistors 304 and 306, and a PNP bipolar transistor 307.
The constant voltage circuit 301 outputs a voltage VE1. When an output voltage of the error amplifier circuit 107 exceeds the voltage VE1, a current is drawn through the PNP bipolar transistor 307, so that the output voltage of the error amplifier circuit 107 is clamped up to the voltage VE1 regardless of the output operation of the error amplifier circuit 107. Incidentally, when the output voltage of the error amplifier circuit 107 falls below the voltage VE1 due to the output operation thereof, the current drawing operation of the PNP bipolar transistor 307 is stopped and a voltage value obtained by the output operation of the error amplifier circuit 107 is outputted as it is (refer to, for example, FIG. 1 in Patent Document 1).